1. Field of the Invention
This invention relates to a technique for driving a plasma display panel, and more particularly to a plasma display panel driving method and apparatus that is adaptive for optimizing an AV mode and a PC mode.
2. Description of the Related Art
Recently, there has been highlighted a flat panel display device capable of reducing a weight and a bulk in a cathode ray tube. Such a flat panel display device includes a liquid crystal display, a plasma display panel, a field emission display and an electro-luminescence display, etc. The flat panel display device applies digital signals or analog data to a display panel.
Generally, a plasma display panel (PDP) excites and radiates a phosphorus material using an ultraviolet ray generated upon discharge of an inactive mixture gas such as He+Xe or Ne+Xe, to thereby display a picture. Such a PDP is easy to be made into a thin-film and large-dimension type. Moreover, the PDP provides a very improved picture quality owing to a recent technical development.
Particularly, a three-electrode, alternating current (AC) surface-discharge type PDP has advantages of a low-voltage driving and a long life in that it can lower a voltage required for a discharge using wall charges accumulated on the surface thereof during the discharge and protect the electrodes from a sputtering caused by the discharge.
Referring to FIG. 1, a discharge cell of the three-electrode, AC surface-discharge PDP includes a scanning/sustaining electrode 30Y and a common sustaining electrode 30Z formed on an upper substrate 10, and an address electrode 20X formed on a lower substrate 18.
The scanning/sustaining electrode 30Y and the common sustaining electrode 30Z include a transparent electrode 12Y or 12Z, and a metal bus electrode 13Y or 13Z having a smaller line width than the transparent electrode 12Y or 12Z and provided at one edge of the transparent electrode, respectively. The transparent electrodes 12Y and 12Z are formed from indium-tin-oxide (ITO) on the upper substrate 10. The metal bus electrodes 13Y and 13Z are formed from a metal having a high electrical conductivity to thereby compensate for an electrical property of the transparent electrodes 12Y and 12Z having a high resistance.
On the upper substrate 10 provided with the scanning/sustaining electrode 30Y and the common sustaining electrode 30Z, an upper dielectric layer 14 and a protective film 16 are disposed. Ionized charged particles generated upon discharge are accumulated in the upper dielectric layer 14. The charged particles accumulated in the dielectric layer 14 are referred to as “wall charges”. The protective film 16 protects the upper dielectric layer 14 from a sputtering of the charged particles generated during the plasma discharge and improves the emission efficiency of secondary electrons. This protective film 16 is usually made from MgO.
The address electrode 20X is formed in a direction crossing the scanning/sustaining electrode 30Y and the common sustaining electrode 30Z. A lower dielectric layer 22 and barrier ribs 24 are formed on the lower substrate 18 provided with the address electrode 20X. The lower dielectric layer 22 protects the address electrode 20X and reflects a light going toward the lower substrate 18 upon discharge, thereby enhancing light efficiency.
A phosphorous material layer 26 is formed on the surfaces of the lower dielectric layer 22 and the barrier ribs 24. The barrier ribs 24 are formed in parallel to the address electrode 20X, and divide the cells physically to shut off a leakage of an ultraviolet ray and a visible light generated by the discharge into horizontally adjacent cells to thereby prevent an optical interference between the cells as well as to shut off a movement of the charged particles generated by the discharge into horizontally adjacent cells to thereby prevent an electrical interference.
The phosphorous material layer 26 is excited and radiated by an ultraviolet ray generated upon discharge to produce any one of red, green and blue color visible lights. An inactive mixture gas, such as He+Xe, Ne+Xe or He+Ne+Xe, for a gas discharge is injected into a discharge space defined between the upper/lower substrate 10 and 18 and the barrier ribs 24.
Such a three-electrode AC surface-discharge PDP drives one frame, which is divided into various sub-fields having a different emission frequency as shown in FIG. 2, so as to realize gray levels of a picture. Each sub-field is again divided into a reset interval for uniformly causing a discharge, an address interval for selecting the discharge cell and a sustaining interval for realizing the gray levels depending on the discharge frequency. When it is intended to display a picture of 256 gray levels, a frame interval equal to 1/60 second (i.e. 16.67 msec) in each discharge cell 1 is divided into 8 sub-fields SF1 to SF8 as shown in FIG. 2. Each of the 8 sub-field SF1 to SF8 is divided into a reset interval, an address interval and a sustaining interval. The reset interval and the address interval of each sub-field are equal every sub-field, whereas the sustaining interval and the discharge frequency are increased at a ration of 2n (wherein n=0, 1, 2, 3, 4, 5, 6 and 7) at each sub-field.
Such a PDP driving method is largely classified into a selective writing system and a selective erasing system depending on a scheme of selecting the cells.
The selective writing system selects cells to be turned on in the address period, hereinafter referred to as “on-cell” after initializing all the cells in the reset period. In the sustain period of the selective writing system, a sustain discharge is generated at the one cells.
In the selective writing system, a scanning pulse applied to the scanning/sustaining electrode 30Y is set to have a relatively large pulse width. For this reason, the selective writing system has a drawback in that it is difficult to sufficiently assure a sustain period because an address period becomes long.
Meanwhile, The PDP may generate a pseudo contour noise from a moving picture because of its characteristic realizing the gray levels of the picture by a combination of sub-fields. If the pseudo contour noise is generated, then a picture display quality is deteriorated. For instance, if the screen is moved to the left after the left half of the screen was displayed by a gray level value of 128 and the right half of the screen was displayed by a gray level value of 127, a peak white, that is, a white stripe emerges at a boundary portion between the gray level values 127 and 128. To the contrary, if the screen is moved to the right after the left half thereof was displayed by a gray level value of 128 and the right half thereof was displayed by a gray level value of 127, then a black level, that is, a black stripe emerges at a boundary portion between the gray level values 127 and 128.
In order to eliminate a pseudo contour noise of a moving picture, there has been suggested a scheme of dividing one sub-field to add one or two sub-fields, a scheme of re-arranging the sequence of sub-fields, a scheme of adding the sub-fields and re-arranging the sequence of sub-fields, and an error diffusion method, etc.
If the sub-fields are added so as to eliminate a pseudo contour noise of a moving picture in the selective writing system, then a sustain period becomes insufficient enough that the address period goes longer. For instance, it is assumed that the number of sub-fields in the selective writing system should be increased to 10 and a pulse width of a scanning pulse should be 3 μs in the PDP having a resolution of VGA (video graphics array) class (i.e., 640×480), then the sustain period becomes absolutely insufficient as described below. The address period occupied in one frame interval of 16.67 ms is 3 μs (a pulse width of the scanning pulse)×480 lines×10 (the number of sub-fields)=14.4 ms. On the other hand, the sustain period occupied in one frame interval becomes −0.03 ms, which is a value obtained by subtracting an address period of 14.4 ms, once reset interval of 0.3 ms, an erasure interval of 100 μs×10 sub-fields and an extra time of the vertical synchronizing signal Vsync of 1 ms from one frame interval of 16.67 ms.
In order to overcome such a lack of driving time, there has been suggested a scheme of physically dividing the PDP to drive each screen block simultaneously. However, such a scheme raises another problem in that, because driving integrated circuits must be more added, a manufacturing cost rises.
The selective erasing system selects cells to be turned off, hereinafter referred to as “off-cell”, in the address period after initializing all the cells in the reset period. A sustain discharge is generated within the off-cells in the sustain period of the selective erasing system.
A scanning pulse required in the selective erasing system may be set to has a smaller number than that in the selective writing system. Thus, since the selective erasing system has an address period reduced in comparison with the selective writing system, it can assure a relatively wide sustain period. For instance, if it is assumed that one frame interval is time-divided into 8 sub-fields and a pulse width of the scanning pulse is 1 μs, then an address period occupied in one frame interval has a relatively small value of 3.84 ms, which is 1 μs (a pulse width of the scanning pulse)×480 lines×8 (the number of sub-fields). On the other hand, the sustain period occupied in one frame interval becomes approximately 11.03 ms, which is a value obtained by subtracting an address period of 3.84 ms, an extra time of the vertical synchronizing signal Vsync of 1 ms and 100 μs (reset period)×8 (the number of sub-fields), that is, a full writing interval from one frame interval of 16.67 ms. Such a selective erasing system has an advantage in that it is easy to assure a sustain period even though the number of sub-fields is increased because an address period becomes small.
However, the selective erasing system has a drawback in that, because all the cells are turned off in the reset period, a black brightness in a contrast ratio is raised to deteriorate a contrast characteristic.
In order to overcome a lack of driving time raised in the selective writing system and a deterioration of contrast characteristic raised in the selective erasing system, there has been suggested a strategy (hereinafter referred to as “SWSE scheme”) of making a time division of one frame interval into sub-fields in the selective writing system (hereinafter referred to as “SW sub-fields) and sub-fields in the selective erasing system (hereinafter referred to as “SE sub-fields” in the U.S. Laid-open Patent Gazette No. US-2002-0033675-A1 filed by the applicant.
Referring to FIG. 3, the SWSE scheme makes a time division of one frame interval into 6 SW sub-fields (SF1 to SF6) selecting the on-cells in the selective writing system and 6 SE sub-fields (SF7 to SF12) selecting the off-cells in the selective erasing system.
The SW sub-fields (SF1 to SF6) can express 64 gray levels by the binary coding. The SE sub-fields (SF7 to SF12) can 7 gray levels by the linear coding. Total gray levels to be expressed by a combination of the SW sub-fields (SF1 to SF6) and the SE sub-fields (SF7 to SF12) are 64×7=448.
In the mean time, there has been actively studied a strategy permitting to operate both the AV mode and the PC mode so that the PDP can be compatibly used in a TV, a monitor of computer, a bulletin board and a signboard, etc. Herein, the AV mode is an operation mode corresponding to a TV in which a moving picture is mainly display, whereas the PC mode is an operation mode corresponding to a monitor in which a still picture is mainly display.
Optimum conditions of an image display required for the AV mode and the PC mode are different from each other. The AV mode has an ability to reduce a pseudo contour noise liable to emerge in a moving picture, whereas the PC mode has an ability to express an image by a large number of gray levels.